Value proposition of EMC Simulation for semiconductor manufacturers

 by Joe Sivaswamy, Published on March 15, 2023

With the increasing demand for high-power converters and electronic sensors, it is a challenge for Tier 1 product designers to determine which IC will fit their design needs and also meet EMC compliance.

Electronic products susceptible to EMC issues

Meeting EMC compliance is the responsibility of the end-product designers and not that of the IC manufacturers even though ICs are the source of EMC emissions and are also susceptible to external emissions.

To address EMC at the IC level, the IC manufacturers’ focus is on designing ICs to be EMC resilient and they demonstrate IC EMC compliance for end-use markets through EMC tests performed on reference design boards. They also offer application notes for EMC compliance which may include details on filter requirements to meet compliance. It generally falls short of support to assist in actual end-use applications to meet EMC compliance.  

For Tier 1 companies, EMC issues are a concern in unpredictable time-to-market delays. Suppose a Tier 1 company finds it challenging to meet EMC compliance for a product using an IC from a manufacturer. They may not move forward with the IC for the project design or switch to a different IC manufacturer. So, for the IC manufacturer, it is not a market delay cost but the cost of losing the customer for the intended market allowing competition to gain market share.

EMC Simulation value proposition internal to semiconductor company:

EMC simulations help the IC manufacturers better characterize the EMC behavior during its initial phase of the design cycle and for internal support to the application design team for the reference design platform to demonstrate EMC compliance.

The diagram below describes the use of simulation at different stages of the design cycle and the first two sections are related to how it can help internally to design and demonstrate EMC compliance.

Compliance Scope Use-case
Compliance Scope® use-case in Semiconductor companies and in Tier-1 industries for end use customer support
  1. Pre-tape out and post-tape out: Creating a behavior model for the IC:
    A spice model transient analysis EMC behavior model can be created by the IC design team and can be used in the pre-tape-out stage to verify the EMC behavior of the IC, and after tape-out, to validate the model by actual measurements on a test board. Models can be used for characterizing the IC behavior for different operating conditions, and different package types and compare between ICs of the same family at the early design stage.
  2. Pre and post-reference design: EMC simulation on reference design board:
    The validated model can be used at the prefabrication stage of reference design to validate the PCB design of the reference design board and to validate compliance for an EMC standard relevant to an intended market segment. Once validated by simulation, and when the board gets ready, it can be validated using noise source measurement at the IC pin and correlate the simulation to EMC measurements performed on the reference design board. Integrating EMC simulation in this process at different stages of the design cycle helps to create a predictable EMC behavior model for the IC which can then be used to assist in end-use applications for its customers. 

EMC Simulation value proposition for end-use application for a semiconductor company:

IC manufacturers are in a unique position to be able to come up with more accurate EMC behavior models using transient analysis as noise source models. IC manufacturers know their ICs and understand the IC parasitics to be able to generate predictable IC EMC models. These models can be refined, and improved with simulations, to be used at all levels of the designs within the company and made available for end-use applications to their customers. 

EMC analyses done today by IC manufacturers are generally only for internal use. It is also true that traditional EM solver simulation tools do not offer a proper platform to create and validate the models as an EMC test environment and to correlate them to EMC measurements to different EMC standards.  

For an IC company, the types of users of the simulation tools are different at different stages of the product design, simulations engineers are involved at an early stage whereas hardware engineers are involved in the application development and support to Tier 1 customers.  A good EMC simulation tool has to cater to all these levels of users, with the capabilities of a complex 3D solver at the same time simple enough for use by a hardware engineer. (Example of such a simulation software: Compliance Scope by Simyog Technology)

Approach to EMC Simulations and modeling by Semiconductor company

Semiconductor companies should start integrating EMC simulations into the design cycle and make it a practice to offer EMC behavioral models as part of the design support for their customers. It will not only improve their IC design process for EMC compliance but will play an important design support tool for end-use applications reducing the chances of their ICs not getting accepted due to EMC concerns.

The IC manufacturer can create a support simulation platform where its customers can bring in their end-use applications into the simulation and verify the EMC behavior. Such a platform will not only help to design the IC into end-use applications to meet EMC compliance, but it will also help the Tier 1 company with its PCB design for its PCB transfer function analysis and characterization relating to the IC behavior.

Additional support that  IC designer can provide for the end-use design:

  1. Reference design boards are designed and tested for EMC compliance generally for a fixed operating condition. If the end-use application uses a different operating condition, EMC simulation on the same reference design board can be run with the end-use operating condition to validate EMC compliance.
  2. Some designs may require the use of external filters to meet EMC compliance. System designers can assist in end-use application filter design.
  3. IC designers generally offer different ICs within the same family, with some designed for lower emissions. Simulations can assist the customer to upgrade their design with a newer IC with lower emissions and to demonstrate to switch to a new IC in the family for better EMC performance, helping to transition to a new design within the same family of ICs.      

Looking into the future of EMC simulation for compliance:

EMC Simulations will become a significant part of testing for EMC compliance in the future. IC manufacturers can play an important role in the transition to adapting simulations for EMC compliance by offering predictable EMC behavior models for to end-use applications. 

IC manufacturers today don’t see offering IC models to better promote their products to their customers and only do limited levels of simulation for internal use. Manufacturers who take the lead in offering predictable EMC models for design support to its customers have the opportunity for better acceptance of their products in the market and to become preferred vendors to Tier 1 companies.

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How EMC simulation is helpful for IC application Reference board designs | Part 2 of 2

By:  Joe Sivaswamy, &Dr. Bibhu Prasad Nayak, Published on December 29, 2022

This blog is a follow up to part 1 of EMC simulation for IC reference design boards. If you have not read the part 1 of this blog series, we encourage you to read it here.

In this article, we review how simulations help to validate an Isolated gate driver for compliance to CISPR25 radiated emissions using a reference design evaluation board.

Technical information for this article is referenced from IEEE publication 9947145

Isolation is critical in high-voltage automotive and industrial applications to maintain functionality and protect against electric shocks. In applications of power rails of 800V or higher, for additional isolation, reinforced isolation devices are used. Reinforced isolation is the equivalent of two basic isolation layers enabled through a single isolation barrier.

One such application device is an isolated gate/switch driver which serves as a buffer circuit that amplifies a low-power input from a microcontroller and other similar sources to drive semiconductor power switches efficiently. 

The EVM board referenced in this article is for a reinforced isolation gate driver implementation IC, enabled through a single laminate air-core transformer. Inductive coupling of the transformer provides power and control signaling transmission for the driver stage.

EMC issues with reinforced isolated gate drivers
Data transitions through the reinforced isolation transformer typically have sharp edge rates that potentially can cause conducted and radiated emissions due to the generation of high di/dt and dv/dt transient loops in the system (due to both package and PCB). 

EMC simulation on the EVM board for radiated emission helps to identify two primary mechanisms as significant contributors to the emission noise. These include PCB edge and input-to-output dipole emissions. The main component of emissions is the common-mode current injected across the isolation barrier. 

Isolated switch driver IC EVM board
The device under test, an 8 pin SOIC pack, is a fully integrated reinforced isolated power switch driver. (Figure. 1). It features a 10-V gate drive with a 1.5/3-A peak source and sink current with a reinforced isolation rating of 5-kVRMS. The primary side includes a transmitter that drives an alternating current into the primary winding of an integrated transformer and uses spread-spectrum techniques for improving EMI performance. The transformer is designed on a laminate-based substrate. 

The evaluation module for the device (EVM) is a 2-layer PCB designed and optimized for CISPR 25 EMC requirements.

Functional block diagram of an automotive reinforced isolated switch driver with integrated gate supply.
Figure. 1. Functional block diagram of an automotive reinforced isolated switch driver with integrated gate supply.
EVM PCB for the switch driver
Figure. 2. EVM PCB for the switch driver.

Noise source model extraction for the simulation
With a system-level transient analysis, the voltage vs. time waveform between primary GND and secondary GND is extracted as the noise source stimuli/excitation for the simulation.

The field analysis is set up and performed using the simulation software. Figure 3 shows the setup in the EMC virtual modeling and simulation platform. The simulated emission profile is then compared to CISPR 25 radiated emission measurements envelope.

Simyog virtual lab for EMC Simulation
Figure. 3. Modeling and simulation of CISPR 25 in EMC virtual platform.

EMC Simulation vs Measurement Correlation
Figure. 4  shows the radiated emission simulation versus measurement results comparison. The results correlate well for frequency band 30-300MHz (within +/-3dB magnitude). Every resonant peak that corresponds to switcher fundamental and harmonic frequencies is recovered. For the 450MHz and 540MHz, over a 10dB difference was observed between simulation and measurement.

Simulation vs measurement for CISPR 25 radiated emission.
Figure. 4. Simulation vs measurement for CISPR 25 radiated emission.

Key findings
The main advantage of doing a system simulation is understanding the system behavior under the influence of the noise generated from the IC. In this case, simulation reveals that emission is high when the system resonance frequency matches with the peaks of the noise spectrum. This information can be useful when it comes to meeting the emission standard by judiciously choosing the noise spectrum.

System resonances and noise spectrum.
Figure. 5. System resonances and noise spectrum.

EMC simulation with predictive modeling helps to optimize the design performance of a device using an EVM before testing the product for compliance.    

References: CISPR 25 Radiated Emission Simulation and Measurement Correlation of an Automotive Reinforced Isolated Switch Driver.

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